Comparision and Implementation of Cryptography Algorithm By Using VHDL

This paper presents the comparison and optimization of Galois field algorithm and IDEA(International data encrypted algorithm) using VHDL(xc2v40-6cs144)with the help of Xilinx-Ise (9.2) .In terms of security IDEA algorithm is very much superior where as in terms of timings Galois field is much better and is already patented of Ascom. These are cryptographic algorithm used for security purpose. The Galois field property of multiplication is XORing based process along with the use of irreducible polynomial selected by National Institute of Standard Technology that retains the multiplication result to the same number of bits as that of the multiplier & multiplicand bit. The encrypted result can thus be used for secure data transmission and is hatched at the decoder end using the FPGA lookup table which uses the symmetric key. We have investigated different encoded result using encoding algorithm. Simulation result of Galois field algorithm shows that using Galois multiplication property a 4 x 4 bit multiplication yields an output of 4 bit result .Thus it reduces the number of bits in results and encodes the data too. This can be implemented in cryptographic applications where as in IDEA Algorithm the whole algorithm is divided into modules and among all of them the most time consuming one is the modulo multiplication module .The IDEA algorithm that is used computes the product in a recursive fashion and it uses divide and conquer approach during multiplication which ultimately consumes less time and increases the through put in the algorithm. The block size considered here is the same as of traditional IDEA encryption algorithm. In IDEA for synthesis we have used Xylinx 9.2i and for simulation we have used modelsim 10.2.